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- ;
- ; stepper.asm
- ;
- ; Created: 12/05/2025 13:14:09
- ; Author : Bemposta
- ;
- .DSEG
- i: .byte 1
- pasos: .byte 4
- .CSEG
- ser r16
- out ddrb, r16
- call init_array
- start:
- ;Griga 20*4 pasos derecha
- ldi r16, 200
- mov r3, r16
- bucleexternoD:
- clr r20 ;indice del bucle for.
- bucleforiternoD:
- push r20
- call get_paso ;Llamada a funcion con parametro
- pop r21
- out portb, r21
- call delay1
- inc r20
- cpi r20, 4
- brne bucleforiternoD
- dec r3
- brne bucleexternoD
- call delay2
- ;Griga 20*4 pasos derecha
- ldi r16, 200
- mov r3, r16
- bucleexternoI:
- clr r20 ;indice del bucle for.
- ldi r30, 3
- bucleforiternoI:
- push r30
- call get_paso ;Llamada a funcion con parametro
- pop r21
- out portb, r21
- call delay1
- dec r30
- inc r20
- cpi r20, 4
- brne bucleforiternoI
- dec r3
- brne bucleexternoI
- call delay2
- rjmp start
- ;============================================================================
- ; Funciones
- ;============================================================================
- get_paso:
- PUSH YH ;backup del reg. Y,
- PUSH YL ; parte alta y baja.
- IN YL, SPL ;Iniciamos el reg.
- IN YH, SPH ; a la cima de la pila
- PUSH R0 ;backup R0
- PUSH xl ;backup R26
- PUSH xh ;backup R27
- LDD R0, Y+5 ;sacamos var2 de la pila
- ldi xl, low(pasos)
- ldi xh, high(pasos)
- add xl, r0
- clr r0
- adc xh, R0
- ld r0, x
- STD Y+5, R0
- terminar:
- pop xh ;es el r27
- pop xl ;es el r26
- POP R0 ;Restauramos R0 antes de terminar.
- POP YL ;Restauramos YL antes de terminar.
- POP YH ;Restauramos YH antes de terminar.
- ret
- ;============================================================================
- init_array:
- push yl ;es el r28
- push yh ;es el r29
- push r16
- ldi yl, low(pasos)
- ldi yh, high(pasos)
- ldi r16, 0b00000001
- st y, r16
- ldi r16, 0b00000010
- std y+1, r16
- ldi r16, 0b00000100
- std y+2, r16
- ldi r16, 0b00001000
- std y+3, r16
- pop r16
- pop yh
- pop yl
- ret
- ;============================================================================
- ; 50ms at 16.0 MHz
- delay1:
- PUSH r18
- PUSH r19
- PUSH r20
- ldi r18, 84
- ldi r19, 29
- L1_1:
- dec r19
- brne L1_1
- dec r18
- brne L1_1
- nop
- pop r20
- pop r19
- pop r18
- ret
- ;============================================================================
- ; 50ms at 16.0 MHz
- delay2:
- PUSH r18
- PUSH r19
- PUSH r20
- ldi r18, 82
- ldi r19, 43
- ldi r20, 0
- L1_2:
- dec r20
- brne L1_2
- dec r19
- brne L1_2
- dec r18
- brne L1_2
- lpm
- nop
- pop r20
- pop r19
- pop r18
- ret
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